Field of the Invention
The present invention relates to a semiconductor device which can be manufactured at low cost and which includes a through-electrode having high connection reliability, and a method for manufacturing the same.
Description of the Related Art
In recent years, digital cameras and video cameras have been manufactured by mounting a solid-state imaging device including a semiconductor device such as a CCD or a CMOS to cameras. Further, regarding camera functions associated with cellular phones, a camera module constituted by a solid-state imaging device and a lens system has been built into cellular phones. A high-resolution solid-state imaging device which is small-sized, lightweight, and thin is required for these applications. Consequently, in order to realize a pixel count resolution of, for example, 10 million pixels using a small-sized solid-state imaging element, a fine pixel having a size of approximately several μm square has been manufactured.
Conventionally, a solid-state imaging device has been manufactured as follows (see Japanese Unexamined Patent Application, First Publication No. 2011-003863). First, a solid-state imaging element of an integrated circuit and a circuit pattern of an integrated circuit are created on the surface of a semiconductor substrate such as a silicon substrate by a single-sided exposure process. A glass substrate 20 is bonded to the surface of the semiconductor substrate, the thickness of the semiconductor substrate is reduced by polishing the substrate from the back surface thereof, and a through-hole (through-silicon via: hereinafter, abbreviated as a TSV) is processed on the semiconductor substrate.
Further, a conductive substance is formed on the inner wall of the TSV to form a through-electrode, and an electrical signal of image information obtained in a solid-state imaging element formed on the surface of the semiconductor substrate is sent to the back surface of the semiconductor substrate through the through-electrode. Electrical connection to an external circuit can be performed through a connection terminal 16 of a BGA (Ball Grid Array) formed on the back surface of the semiconductor substrate.
As described above, a single-sided exposure process of an element-forming surface is used for forming a semiconductor element on a semiconductor substrate such as a silicon substrate. However, a through-electrode in which a conductor layer is formed on the wall surface of a through-hole with an insulating film interposed therebetween is required for performing multi-layer lamination on a semiconductor chip. The through-hole is normally formed by a dry-etching method using plasma. However, since the etching depth is several times or more that in a normal semiconductor process, for example, 20 to 500 μm, the etching time also increases. For this reason, plasma exerts an influence on the semiconductor element formed on the semiconductor substrate. Exposure to plasma for a long period of time causes a rise in the temperature of the surface of the semiconductor substrate, or the occurrence of a defect in the semiconductor element due to an electric field of the plasma.
In addition, in order to shorten the time when the through-hole is formed so as to reach the back surface of the semiconductor substrate, chemical mechanical polishing (CMP) is performed on the back surface of the semiconductor substrate, or the thickness thereof is reduced by cutting off the back surface through etching. However, it takes time to cut off the back surface, and manufacturing costs increase.
In order to form the through-hole as described above at low cost, there is also a method of forming a photoresist for dry-etching having an opening for processing a hole through dry-etching, performing isotropic etching for processing the semiconductor substrate up to a portion located further outside than the opening, and forming a first hole having a tapered shape (see Japanese Unexamined Patent Application, First Publication No. 2007-053149). According to such a method, anisotropic etching is next performed, and a second hole is formed which has a perpendicular cylindrical wall surface with a diameter of an opening of the photoresist for dry-etching, from the bottom of the first hole having a tapered shape to an insulating film located at a position of an I/O pad 12 located below the semiconductor substrate. In this manner, the lower hole of a two-stage through-hole is formed up to the insulating film located at a position of the I/O pad 12.
In Japanese Unexamined Patent Application, First Publication No. 2007-053149, the following processes are described.
(1) An insulating film is formed on the wall surface and bottom of the lower hole of the two-stage through-hole, and an Al film for an etching resist is formed on the insulating film.
(2) A pattern of an etching resist having an opening at the bottom of the two-stage through-hole is formed on the Al film for an etching resist.
(3) The Al film exposed to an opening of the etching resist is etched by an etching solution.
(4) The etching resist is removed.
(5) Using the Al film having an opening at the bottom of the two-stage through-hole as a protective film of etching, the insulating film exposed to the opening portion is removed by dry-etching.
In the processes so far, the two-stage through-hole reaching the I/O pad 12 is manufactured.
(6) The Al film is removed.
(7) A conductor is formed on the wall surface of the two-stage through-hole which is connected to the I/O pad 12.
However, in the above method of Japanese Unexamined Patent Application, First Publication No. 2007-053149, a lot of processes are required for manufacturing the through-electrode, and manufacturing costs increase. In addition, since manufacturing processes are complicated, the yield rate of the through-electrode is reduced, and the reliability of the through-electrode deteriorates.
The present invention is contrived in view of the problems described above, and is to provide a semiconductor device including a through-electrode which is capable of being manufactured by a low-cost manufacturing method, and has high quality and high reliability.
A semiconductor device to which the present invention is applied is not limited to a package in which an integrated circuit element (IC-chip) is connected to an external circuit in a state where the element is sealed and held. The semiconductor device can also be applied to a printed substrate (for example, an interposer) in which a bare chip is mounted onto the upper surface and a terminal is included at the lower surface.
In addition, there are also various types of integrated circuit elements mounted in the package or the interposer. However, in the following description, a solid-state imaging element is chiefly illustrated by way of example.